IEC-60191-6-5 › Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

IEC-60191-6-5 - 1ST EDITION - CURRENT


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Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.
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Document Number

IEC 60191-6-5 Ed. 1.0 en:2001

Revision Level

1ST EDITION

Status

Current

Publication Date

Aug. 1, 2001

Committee Number

47D