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Scope

This standard was transferred to SEMI (www.semi.org) May 2003

1.1 This practice covers the detection of crystalline defects in the surface region of silicon wafers. The defects are induced or enhanced by oxidation cycles encountered in normal device processing. An atmospheric pressure, oxidation cycle representative of bipolar, metal-oxide-silicon (MOS) and CMOS technologies is included. This practice is required to reveal strain fields arising from the presence of precipitates, oxidation induced stacking faults, and shallow etch pits. Slip is also revealed that arises when internal or edge stresses are applied to the wafer.

1.2 Application of this practice is limited to specimens that have been chemical or chemical/mechanical polished to remove surface damage from at lease one side of the specimen. This practice may also be applied to detection of defects in epitaxial layers.

1.3 The surface of the specimen opposite the surface to be investigated may be damaged deliberately or otherwise treated for gettering purposes or chemically etched to remove damage.

1.4 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

Keywords

defects; dislocation; epitaxy; hillock; imperfections; oxidation; preferential etch; shallow pit; silicon; slip; stacking fault; swirl; ICS Number Code 29.045 (Semiconducting materials)

To find similar documents by ASTM Volume:

10.04 (Electronics; Declarable Substances in Materials; 3D Imaging Systems)

To find similar documents by classification:

29.045 (Semiconducting materials)

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