EIA-J-ED-7402-4 › Historical Revision Information
General Rules for the Preparation of Outline Drawings of Integrated Circuits Thin Smal
EIA-J-ED-7402-4
-
REPLACED BY EIA-EDR-J-7313
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SUPERSEDED
-- See the following:
EIA-J-EDR-7313
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General Rules for the Preparation of Outline Drawings of Integrated Circuits Thin Smal
Document Number
EIA-J-ED-7402-4
Revision Level
REPLACED BY EIA-EDR-J-7313
Status
Superseded
Publication Date
April 1, 1996