IEC-60191-6-10 Mechanical standardization of semiconductor devices - Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON

IEC-60191-6-10 - 1ST EDITION - CURRENT


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IEC 60191-6-10:2003 provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (hereinafter called P-VSON).
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Document Number

IEC 60191-6-10 Ed. 1.0 b:2003

Revision Level

1ST EDITION

Status

Current

Publication Date

Nov. 1, 2003

Committee Number

47D