IEC-61691-6 Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions

IEC-61691-6 - EDITION 2.0 - CURRENT
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IEC 61691-6:2021(E) defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models. This standard is published as a double logo IEC-IEEE standard.
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Document Number

IEC 61691-6 Ed. 2.0 en:2021

Revision Level

EDITION 2.0

Status

Current

Publication Date

June 1, 2021

Committee Number

91