IEC-62530-2 › SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual
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IEC 62530-2:2023 establishes the Universal Verification Methodology (UVM), a set of application programming interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800..1. This is an IEC/IEEE dual logo standard.
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Document Number
IEC 62530-2 Ed. 2.0 en:2023
Revision Level
EDITION 2.0
Status
Current
Publication Date
Oct. 1, 2023
Committee Number
91