BS-IEC-62530 › SystemVerilog. Unified Hardware Design, Specification, and Verification Language
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SystemVerilog. Unified Hardware Design, Specification, and Verification Language
Keywords
Data;Design;Verification;Computer hardware;Data transfer;Computer programs;Syntax;Electronic equipment and components;Semantics;Data representation;Interfaces (data processing);Data processing;Programming languages
To find similar documents by classification:
25.040.01 (Industrial automation systems in general)
35.060 (Languages used in information technology)
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Document Number
BS IEC 62530:2021
Revision Level
2021 EDITION
Status
Current
Publication Date
Aug. 19, 2021
Replaces
BS IEC 62530:2011
Page Count
1320
ISBN
9780539173413
International Equivalent
IEC 62530 Ed.3.0
Committee Number
EPL/501