DESC-DWG-5962-93249 Complete Document History
Microcircuit, Memory, Digital, CMOS, 512 x 9 Parallel Synchronous FIFO, Monolithic Silicon

Complete Current Edition:
   REVISION D - 512 X 9 Parallel Synchronous FIFO, Monolithic Silicon - June 28, 2021

Obsolete Revision Information:
   REVISION C - Microcircuit, Memory, Digital, CMOS, 512 x 9 Parallel Synchronous FIFO, Monolithic Silicon - April 3, 2015
   REVISION B - Microcircuit, Memory, Digital, CMOS, 512 x 9 Parallel Synchr - May 9, 2006
   REVISION A - Microcircuit, Memory, Digital, CMOS, 512 x 9 Parallel Synchr - June 5, 2001
   BASE - Microcircuit, Memory, Digital, CMOS, 512 x 9 Parallel Synchr - Dec. 16, 1994