BS-EN-61523-2 › Historical Revision Information
Delay and power calculation standards. Pre-layout delay calculation specification for CMOS ASIC libraries
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Delay and power calculation standards
Keywords
Metal oxide semiconductors;Electronic engineering;Semiconductors;Integrated circuits;Computerized control
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Document Number
BS EN 61523-2:2002
Revision Level
2002 EDITION
Status
Superseded
Publication Date
Sept. 27, 2002
Page Count
42
ISBN
0580404609
International Equivalent
EN 61523-2 (IEC 61523-2:2002) AS;IEC 61523-2:2002
Committee Number
EPL/501